cpu Project Status (11/22/2014 - 21:33:33)
Project File: schelet.xise Parser Errors: No Errors
Module Name: gpio_sram Implementation State: Mapped (Failed)
Target Device: xc7a100t-3csg324
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Device Utilization Summary [-]
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentS nov. 22 14:13:00 2014   
Translation ReportCurrentS nov. 22 14:13:27 2014   
Map ReportCurrentS nov. 22 14:13:41 2014   
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateS nov. 22 17:22:19 2014
Post-Synthesis Simulation Model ReportOut of DateJ nov. 6 15:23:18 2014

Date Generated: 11/22/2014 - 21:33:33